RISC-V Vector Extension for Edge AI Inference
RISC-V Vector Extension (RVV) brings SIMD-style vector instructions to an open ISA, enabling efficient edge AI inference without proprietary GPUs.
Hardware & Systems
Accelerators, edge computing, silicon, and low-level system performance.
NVLink vs PCIe 5.0: Interconnect Bottlenecks in Multi-GPU AI Training
Compare NVLink and PCIe 5.0 for multi-GPU AI training, including bandwidth, topology, collective communication, and when interconnects bottleneck scaling.
Demystifying HBM3e vs GDDR7: Memory Bandwidth Bottlenecks in Modern AI Accelerators
Analyze HBM3e vs GDDR7 architectures in modern AI accelerators. Compare silicon interposers, PAM3 signaling, thermal footprints, and deployment economics.
